CFP: SYCL 2016: 1st International SYCL Workshop

1st SYCL Workshop (SYCL'16) - co-located with PPoPP'16

Barcelona, Spain Sunday, 13th March, 2016

http://conf.researchr.org/track/PPoPP-2016/SYCL-2016-papers

SYCL (sɪkəl - as in sickle) is a royalty-free, cross-platform C++ abstraction
layer that builds on the underlying concepts, portability and efficiency of
OpenCL, while adding the ease-of-use and flexibility of C++. For example, SYCL
enables single source development where C++ template functions can contain both
host and device code to construct complex algorithms that use OpenCL
acceleration, and then re-use them throughout their source code on different
types of data. SYCL has also been designed with resilience from the start, by
featuring, for example, a fall-back mechanism to automatically re-enqueue
kernels on different queues in case of a failure.

The SYCL Workshop aims to gather together SYCL's users, researchers, educators
and implementors to encourage and grow a community of users behind the SYCL
standard, and related work in C++ for heterogeneous architectures. This will be
a half-day workshop.  SYCL'16 will be held in Barcelona, 13 March 2016,
co-located with PPoPP 2016, HPCA 2016, CGO 2016 and LLVM 2016.

Travel Awards

Student authors who present papers in this workshop are eligible to apply for
travel awards. Further details will be announced after notification of
acceptance.

Important Dates

 Submissions: 23rd November
 Notification: 21st December
 Final version: 24th January, 2016
 Workshop: Sunday, 13th March, 2016

Submission Guidelines

All submissions must be made electronically through the conference submission
site, at https://easychair.org/conferences/?conf=sycl16.
Submissions may be one of the following:

 * Extended abstract: Two pages in standard SIGPLAN two-column conference
   format (preprint mode, with page numbers)

 * Short Paper: Four to six pages in standard SIGPLAN two-column conference
   format (preprint mode, with page numbers)

Submissions must be in PDF format and printable on US Letter size
paper. All submissions will be peer-reviewed by at least two members of the
program committee. We will aim to give longer presentation slots to papers than
to extended abstracts. Conference papers will not be published, but made
available through the website, alongside the slides used for each presentation.
The aim is to enable authors to get feedback and ideas that can later go into
other publications. We will encourage questions and discussions during the
workshop, to create an open environment for the community to engage with.

Topics of interest include, but are not limited to:

 * Applications implemented using SYCL
 * C++ Libraries using SYCL
 * C++ programming models for OpenCL (C++AMP, Boost.Compute, ...)
 * Other C++ applications using OpenCL
 * New proposals to the SYCL specification
 * Integration of SYCL with other programming models
 * Compilation techniques to optimise SYCL kernels
 * Performance comparisons between SYCL and other programming models
 * Implementation of SYCL on novel architectures (FPGA, DSP, ...)
 * Using SYCL in fault-tolerant systems
 * Porting applications from CUDA to SYCL
 * Reports on SYCL implementations
 * Debuggers, profilers and other tools

Organising Committee

 Paul Keir, University of the West of Scotland (UK)
 Ruyman Reyes, Codeplay Software Ltd, Edinburgh (UK)

Program Committee

 Jens Breitbart, TU Munich
 Alastair Donaldson, Imperial College London, UK
 Christophe Dubach, University of Edinburgh, UK
 Joel Falcou, LRI, Université Paris-Sud, France
 Benedict Gaster, University of the West of England, UK
 Vincent Hindriksen, StreamComputing, Netherlands
 Christopher Jefferson, St. Andrews University, UK
 Ronan Keryell, Xilinx, Ireland
 Paul Keir, University of the West of Scotland, UK
 Zoltán Porkoláb, ELTE, Hungary
 Ruyman Reyes, Codeplay Software Ltd, UK
 Francisco de Sande, Universidad de La Laguna, Spain
 Ana Lucia Varbanescu, University of Amsterdam, Netherlands
 Josef Weidendorfer, TU Munich





Please consider the environment and think before you print University of the West of Scotland is a registered Scottish charity. Charity number SC002520. Legal disclaimer The information transmitted is the property of University of the West of Scotland and intended only for the person or entity to which it is addressed and may contain confidential and/or privileged material. Statements and opinions expressed in this e-mail may not represent those of the University. Any review, retransmission, dissemination and other use of, or taking of any action in reliance upon, this information by persons or entities other than the intended recipient is prohibited. If you received this in error, please contact the sender immediately and delete the material from any computer.

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IEEE IC2E Doctoral Symposium CfP

***********Apologies for multiple posting***********

The IC2E Doctoral Symposium is open only to active Ph.D. students. It provides a supportive environment for them to present dissertation research before their peers and a panel of experienced researchers from academia and industry. The symposium will be an excellent opportunity for students to explore academic issues, build relationships with students in related fields, and practice presenting their research. 

Submissions must be single-author, covering the student's dissertation topic (no more than 3 pages long), and a short biographical sketch (1 page long). The format will follow the same guidelines as that of the main IC2E conference. More information can be found at the official site for the symposium here. [http://conferences.computer.org/IC2E/2016/cfdoctoral.htm] 

Looking forward to seeing you in Berline!

IC2E Publicity Chairs

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DEADLINE EXTENDED! Workshop@HiPEAC 2016 High-Level Programming Methods and Directives for Multicore and Manycore systems

High-Level Programming Methods and Directives for Multicore and Manycore systems (HPM4MMS)

http://rt.uits.iu.edu/workshops/HPM4MMS2016.php

January 20, 2016

Co-located with HiPEAC 2016

https://www.hipeac.net/2016/prague/

Prague, Czech Republic

CALL FOR PAPERS

As heterogeneous node architectures are becoming more prevalent for mainstream computing systems, the requirement for simple and platform portable programming methods manifests in a number of different programming strategies. Application developers that want to migrate existing to or develop new applications for these novel platforms, are looking for best-practice approaches that offer a reasonable results in a short period of development time. As a result domain specific languages as well as directive based programming methods are welcome strategies when targeting heterogeneous system architectures, since they can abstract the underlying hardware specific details of low-level programming approaches and have shown to offer very good productivity. The holy grail for all such strategies is to achieve not only a platform portability but also offer an application performance the is comparable to the low-level programming models on multiple platforms without code changes. The proposed workshop will solicit papers and presentations both on the methodology of these approaches as well as best-practice experiences from early adopters.

Topics of interest for workshop submissions include (but are not limited to): 

• Directives-based programming models for current and emerging systems
• Ideas and implementations for language extensions
• Language extensions or programming strategies for memory hierarchies
• Interoperability and Composability with low-level APIs
• Users’ experiences and implementations
• Scientific libraries interoperability with directive-based programming models
• Exploring high-level prescriptive or descriptive programming approaches
• Hybrid programming approaches (OpenMP + MPI, MPI +X, MPI + OpenACC and so on)
• Task-based programming (asynchronous execution, scheduling)
• Translating to low-level API, design approaches and challenges
• Experiences developing applications for current and emerging systems
• Challenges in maintaining a portable yet single code base
• Debugging, performance evaluation and benchmark studies
• Energy/Power-aware compiler and runtime optimizations for current and emerging systems

 Important Deadlines:

Paper Submission Deadline – OCTOBER 30th, 2015 

November 6^th, 2015

Author notification: DECEMBER 4th, 2015

Final Camera Ready: DECEMBER 11th, 2015

Papers Submission Guidelines:

Papers should present original research and should provide sufficient background material to make them accessible to the broader community.

Format: Submissions are limited to 10 pages in the IEEE format (see http://www.ieee.org/conferences_events/conferences/publishing/templates.html). The 10-page limit includes figures, tables, and appendices, but does not include references, for which there is no page limit.

Use EasyChair to submit your paper:

https://easychair.org/conferences/?conf=hpm4mms

Proceedings to be published <under discussion>. 

Program Chair and Co-Chairs

Christian Terboven, RWTH Aachen University, Germany

Guido Juckeland, TU Dresden, Germany

Robert Henschel, Indiana University, USA

Sunita Chandrasekaran, University of Delaware, USA

Steering Committee

Matthias Muller, RWTH Aachen University, Germany

Rosa Badia, BSC, Spain

Barbara Chapman, University of Houston, USA

Jeff Vetter, ORNL, USA

Program Committee

Wei Ding (AMD, USA)

Torsten Hoefler (ETH, Zurich) 

Amit Amritkar (University of Houston, USA)

Michael Klemm (Intel, Germany)

Mark Govette (NOAA, USA)

Costas Bekas (IBM, Switzerland)

Sandra Wienke (RWTH Aachen, Germany)

Adrian Jackson (EPCC, UK)

Andreas Knuepfer (TU Dresden, Germany)

Suraj Prabhakaran (TU Darmstadt, Germany)

Saber Feki (KAUST, Saudi Arabia)

Bora Ucar (CNRS and ENS Lyon, France) 

Toni Collis (EPCC, UK)

Luc Bouge (ENS Cachan, France)

Steven Olivier (Sandia National Laboratory, USA)

Henri Jin (NASA-Ames, USA)

Will Sawyer (CSCS, ETH, Zurich)

Questions?  Please contact one of the workshop organizers:

Christian Terboven, RWTH Aachen University, Germany

Guido Juckeland, TU Dresden, Germany

Robert Henschel, Indiana University, USA

Sunita Chandrasekaran, University of Delaware, USA

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CFP Reminder: PMAM 2016 - The Seventh International Workshop on Programming Models and Applications for Multicores and Manycores

Rapid advancements in multicore and chip-level multi-threading
technologies open new challenges and make multicore systems a part of the
computing landscape. From high-end servers to mobile phones, multicores
and manycores are steadily entering every single aspect of the information
technology.

However most programmers are trained in sequential programming, yet most
existing parallel programming models are prone to errors such as data race
and deadlock. Therefore to fully utilise multicore and manycore hardware,
parallel programming models that allow easy transition of sequential
programs to parallel programs with good performance and enable development
of error-free codes are urgently needed.

This workshop is dedicated primarily to gather researchers and
practitioners addressing the main challenges and share experiences in the
emerging multicore and manycore software engineering and distributed
programming paradigm. This workshop aims to provide a discussion forum for
people interested in programming environments, models, tools and
applications specifically designed for parallel multicore and manycore
hardware environments.



#### Objectives, scope and optics of the workshop

The program committee cordially invites any novel research ideas in (but
not limited to) the following topics:

* programming models and systems for multicore, manycore, and clusters of
multicore/manycore
* multicore and manycore software engineering
* parallel and distributed algorithms on GPU and multicore clusters
* parallel libraries and frameworks
* performance analysis, efficiency and effectiveness
* massively parallel processing on multicore/manycore systems and clusters
* automated parallelization and compilation techniques
* debugging and performance autotuning tools and techniques for
multicore/manycore applications
* parallel algorithms, applications and benchmarks on multicore/manycore
systems
* runtime power/energy management on multicore/manycore systems and clusters
* fault tolerance and resilience


#### Important Dates

Paper submission deadline : November 16, 2015
Notification of acceptance : December 14, 2015
Camera-ready papers due : January 11, 2016


#### Manuscript Submission

Papers reporting original and unpublished research results and experience
are solicited. All paper submissions will be handled electronically via
EasyChair.

http://www.easychair.org/conferences/?conf=pmam2016

Papers must not exceed 10 pages in standard ACM two-column conference
format (preprint mode, with page number and the 9pt template).

Authors must register and submit their paper through the online submission
system. If you have problems accessing the system, e-mail your submission
to:

pmam2016@cs.otago.ac.nz



#### Proceedings

Accepted papers will be published in the ACM Digital Library,  and will be
included in the Elsevier databases Scopus and Compendex (EI indexed).

Selected best papers of PMAM will be considered for publication in a
special issue of Concurrency and Computation: Practice and Experience or
The International Journal of High Performance Computing Applications.



#### Travel Awards

Student authors who present papers in this workshop are eligible to apply
for travel awards.  Further details will be announced after notification
of acceptance.





For more details, please refer to:

http://conf.researchr.org/track/PPoPP-2016/pmam-2016-papers


For enquiries, please contact:

pmam2016@cs.otago.ac.nz

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CFP: Automatic Performance Tuning (iWAPT 2016)

:: iWAPT 2016 :: CALL FOR PAPERS
The 11th International Workshop on Automatic Performance Tuning
http://www.iwapt.org/2016/

May 27, 2016 in Chicago, Illinois, USA

The iWAPT 2016 will be held in conjunction with IPDPS 2016.
http://www.ipdps.org/
===============================================================

# Important dates

* Submissions due: Sunday, Dec 20, 2015 (anywhere on Earth)
* Notification:    Saturday, Feb 6, 2016
* Camera-ready:    TBA

Submission site:   http://edas.info/
(If you do not have an EDAS account, please create it first.)

# About iWAPT

The goal of the Tenth International Workshop on Automatic Performance
Tuning (*iWAPT 2016*) is to bring together researchers who are
investigating automated techniques for constructing and/or adapting
algorithms and software for high performance on modern complex computer
architectures.

We are particularly interested in autotuning and its relationship to the
following topic areas (list is not exhaustive):

* Machine-adaptive algorithms and software
* Program generation
* Performance analysis and modeling
* Parallel and distributed computing
* Numerical algorithms and libraries
* Multi- and manycore systems, heterogeneous architectures
* Compilation, e.g., iterative and empirical compilers
* Programming models
* Runtime systems
* Empirical search heuristics
* Power- and/or energy-aware computing

# Paper Submission guidelines

Submitted manuscripts may not exceed ten (10) single-spaced
double-column pages using 10-point size font on 8.5x11 inch pages
(IEEE conference style), including figures, tables, and references.
See style templates for details:

LaTex Package (ZIP):
http://www.ipdps.org/templates/IEEECS_CPS_LaTeX_Letter_2Col.zip

Word Template (ZIP):
http://www.ipdps.org/templates/IEEECS_CPS_8.5x11x2.zip

Files should be submitted by following the instructions available at
the EDAS portal (http://edas.info/). Authors must ensure that
electronically submitted files are formatted in PDF format for 8.5x11
inch paper.

Accepted submissions will be included in the IPDPS proceedings.

Submission implies the willingness of at least one of the authors to
register and present the paper. PostScript and source versions of your
paper must be submitted electronically through the paper submission
system.

# Program Committee

* (Chair) Weichung Wang, National Taiwan University, Taiwan
* (Vice Chair) Toshiyuki Imamura, Riken AICS, Japan


* Siegfried Benkner, University of Vienna, Austria
* Ray-Bing Chen, National Cheng Kung University, Taiwan
* I-Hin Chung, IBM T. J. Watson Research Center, USA
* Toshio Endo, Tokyo Institute of Technology, Japan
* Takeshi Fukaya, Riken AICS, Japan
* Takeshi Iwashita, Hokkaido University, Japan
* Jeremy Johnson, Drexel University, USA
* Takahiro Katagiri, The University of Tokyo, Japan
* Jakub Kurzak, University of Tennessee, USA
* Che-Rung Lee, National Tsing Hua University, Taiwan
* Boyana Norris, University of Oregon, USA
* Satoshi Ohshima, The University of Tokyo, Japan
* Louis-Noel Pouchet, Ohio State University, USA
* Daisuke Takahashi, University of Tsukuba, Japan
* Hiroyuki Takizawa, Tohoku University, Japan
* Teruo Tanaka, Kogakuin University, Japan
* Keita Teranishi, Sandia National Laboratories, USA
* Richard Vuduc, Georgia Institute of Technology, USA
* Masahiro Yasugi, Kyushu Institute of Technology, Japan
* Yusaku Yamamoto, The University of Electro-Communications, Japan

# Organizing Committee

* (General Chair) Osni Marques, LBNL, USA
* (General Vice-Chair) Reiji Suda, The University of Tokyo, Japan
* (Finance Chair) Yusaku Yamamoto, The University of
Electro-Communications, Japan
* (SC liaison) Takahiro Katagiri, The University of Tokyo, Japan
* (Web Chair) Hisayasu Kuroda, Ehime University, Japan
* (Publicity Chair) Akihiro Fujii, Kogakuin University, Japan
* (PC Chair) Weichung Wang, National Taiwan University, Taiwan

# Contact

iwapt2016@iwapt.org
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ADAPT 2016 paper submission deadline soon (1 Nov)

Apologies if you receive multiple copies of this call!

The paper submission deadline for the 6th Workshop

on Adaptive and Self-tuning Computing Systems

is approaching (1st of November)!

We are interested in lively workshop discussions

and accept short position and tool papers,

demos with reproducible experiments,

wild and crazy ideas, and early stage work!

Also, do not miss a chance to advertise your work

via our public Reddit-based discussions!

If you have any questions, don't hesitate to get in touch!

=================================================================

                       CALL FOR PAPERS

             ADAPT: 6th International Workshop on

            Adaptive Self-tuning Computing Systems                           

           18 January 2016, Prague, Czech Republic

               (co-located with HiPEAC 2016)

                 http://adapt-workshop.org

=================================================================

ADAPT is an interdisciplinary workshop to discuss and demonstrate

practical and reproducible techniques, methodology and tools that

can help convert existing or future software and hardware into

adaptive, scalable and self-tuning systems. Such systems should

be able to automatically improve their characteristics (execution

time, energy usage, size, accuracy, reliability, bandwidth,

adaptation time and memory usage) depending on an application and

its input, available resources, run-time state of the system, and

user requirements.

ADAPT topics include but are not limited to machine learning

based autotuning, representative benchmarking, real application

self-tuning, automatic performance modeling, self-tuning

compilers, automatic bug detection, run-time adaptation,

automatic fault tolerance, dynamic hardware reconfiguration,

predictive scheduling, new programming models, green data

centres, adaptive embedded devices, reproducible experimentation,

and optimization knowledge sharing. You can check out accepted

papers from the past ADAPT workshops at:

* http://adapt-workshop.org/prior_workshops.html

All further details about new submission and reviewing process

is available at ADAPT website:

* http://adapt-workshop.org

==== Workshop organizers ====

* Christophe Dubach, University of Edinburgh (UK)

* Grigori Fursin, dividti (UK) / cTuning Foundation (France)

==== Program Committee ====

* Tarek Abdelrahman, University of Toronto, Canada

* Jason Ansel, GoDaddy, USA

* Milind Chabbi, HP Labs, Palo Alto, USA

* Tianshi Chen, ICT, China

* Koen De Bosschere, Ghent University, Belgium

* Evelyn Duesterwald, IBM TJ Watson, USA

* Thomas Fahringer, University of Innsbruck, Austria

* Michael Gerndt, TU Munich, Germany

* Timothy Jones, University of Cambridge, UK

* Anton Lokmotov, dividiti, UK

* Chi-Keung Luk, Intel, USA

* Toshio Nakatani, IBM, Japan

* Lasse Natvig, NTNU, Norway

* Raphael Poss, VU University Amsterdam, Netherlands

* Christian Plessl, Universität Paderborn, Germany

* Aaron Smith, Microsoft Research, USA

* Michela Taufer, University of Delaware, USA

* Petr Tuma, Charles University, Czech Republic

* Ana Lucia Varbanescu, University of Amsterdam, Netherlands

* Vittorio Zaccaria, Politecnico di Milano, Italy

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Deadline Approaching! ACM HPDC 2016 Call for Workshops

                         **** Call for Workshops ****

                 The 25th International ACM Symposium on
           High-Performance Parallel and Distributed Computing
                               (HPDC-2016)

                Kyoto, Japan - May 31 through June 4, 2016

          http://www.hpdc.org/2016/workshops/call-for-workshops

                         Sponsored by ACM SIGARCH
                      In-Cooperation with ACM SIGHPC

Overview
=======================================================================
The organizers of the 25th International ACM Symposium on
High-Performance Parallel and Distributed Computing (HPDC'16) call for
proposals for workshops to be held with HPDC'16. The workshops will be
held in May/June 2016 in Kyoto, Japan.

Workshops should provide forums for discussion among researchers and
practitioners on focused topics or emerging research areas relevant to
the HPDC community. Organizers may structure workshops as they see fit,
including invited talks, panel discussions, presentations of work in
progress, fully peer-reviewed papers, or some combination. Workshops
could be scheduled for half a day or a full day, depending on interest,
space constraints, and organizer preference. Organizers should design
workshops for approximately 20-40 participants, to balance impact and
effective discussion.

Proposal Submission:
=======================================================================
Workshop proposals must be submitted in two stages:
Stage 1: Online Form at
https://docs.google.com/forms/d/1UzcmN_re62ztiDxjrAxhWiUuTVPJO7IUt5tdAPKAzC4/viewform
Stage 2: A proposal in PDF format sent via email to the HPDC'16
Workshops Chairs at hpdc16-workshops at datasys.cs.iit.edu

Stage 2 proposal should include:
- The name and acronym of the workshop
- A description (0.5-1 page) of the theme of the workshop
- A description (one paragraph) of the relation between the theme of the
   workshop and of HPDC
- A list of topics of interest
- The names and affiliations of the workshop organizers, and if
   applicable, of a significant portion of the program committee
- A description of the expected structure of the workshop (papers,
   invited talks, panel discussions, etc.)
- Data about previous offerings of the workshop (if any), including the
   attendance, the numbers of papers or presentations submitted and
   accepted, and the links to the corresponding websites
- A publicity plan for attracting submissions and attendees. Please also
   include expected number of submissions, accepted papers, and attendees
   that you anticipate for a successful workshop.

Due to publication deadlines, workshops must operate within roughly the
following timeline: papers due beginning of February (2-3 weeks after
the HPDC deadline), and selected and sent to the publisher by beginning
of April.

Important dates:
=======================================================================
Workshop Proposals Due: October 24, 2015
Notifications: November 1, 2015
Workshop CFPs Online and Distributed: November 10, 2015

Workshop Chairs
=======================================================================
Naoya Maruyama, RIKEN Advanced Institute for Computational Science
Ioan Raicu, Illinois Institute of Technology & Argonne National
Laboratory
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Deadline Approaching! ACM HPDC 2016 Call for Workshops

                         **** Call for Workshops ****

                 The 25th International ACM Symposium on
           High-Performance Parallel and Distributed Computing
                               (HPDC-2016)

                Kyoto, Japan - May 31 through June 4, 2016

          http://www.hpdc.org/2016/workshops/call-for-workshops

                         Sponsored by ACM SIGARCH
                      In-Cooperation with ACM SIGHPC

Overview
=======================================================================
The organizers of the 25th International ACM Symposium on
High-Performance Parallel and Distributed Computing (HPDC'16) call for
proposals for workshops to be held with HPDC'16. The workshops will be
held in May/June 2016 in Kyoto, Japan.

Workshops should provide forums for discussion among researchers and
practitioners on focused topics or emerging research areas relevant to
the HPDC community. Organizers may structure workshops as they see fit,
including invited talks, panel discussions, presentations of work in
progress, fully peer-reviewed papers, or some combination. Workshops
could be scheduled for half a day or a full day, depending on interest,
space constraints, and organizer preference. Organizers should design
workshops for approximately 20-40 participants, to balance impact and
effective discussion.

Proposal Submission:
=======================================================================
Workshop proposals must be submitted in two stages:
Stage 1: Online Form at
https://docs.google.com/forms/d/1UzcmN_re62ztiDxjrAxhWiUuTVPJO7IUt5tdAPKAzC4/viewform
Stage 2: A proposal in PDF format sent via email to the HPDC'16
Workshops Chairs at hpdc16-workshops at datasys.cs.iit.edu

Stage 2 proposal should include:
- The name and acronym of the workshop
- A description (0.5-1 page) of the theme of the workshop
- A description (one paragraph) of the relation between the theme of the
   workshop and of HPDC
- A list of topics of interest
- The names and affiliations of the workshop organizers, and if
   applicable, of a significant portion of the program committee
- A description of the expected structure of the workshop (papers,
   invited talks, panel discussions, etc.)
- Data about previous offerings of the workshop (if any), including the
   attendance, the numbers of papers or presentations submitted and
   accepted, and the links to the corresponding websites
- A publicity plan for attracting submissions and attendees. Please also
   include expected number of submissions, accepted papers, and attendees
   that you anticipate for a successful workshop.

Due to publication deadlines, workshops must operate within roughly the
following timeline: papers due beginning of February (2-3 weeks after
the HPDC deadline), and selected and sent to the publisher by beginning
of April.

Important dates:
=======================================================================
Workshop Proposals Due: October 24, 2015
Notifications: November 1, 2015
Workshop CFPs Online and Distributed: November 10, 2015

Workshop Chairs
=======================================================================
Naoya Maruyama, RIKEN Advanced Institute for Computational Science
Ioan Raicu, Illinois Institute of Technology & Argonne National
Laboratory
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CFP - Workshop CCTE'16 co-locate with IEEE IC2E conference

=====================================================================

CALL FOR PAPERS

Cloud Computing Technoeconomic Engineering (CCTE) Workshop

http://ccte.hua.gr

in conjunction with IEEE International Conference on Cloud Engineering 2016 (IC2E 2016)

http://conferences.computer.org/IC2E/2016/index.htm

Berlin, Germany
April 4-8 2016

Cloud Computing delivers on-demand resources just like commoditized services, such as electricity, gas, water and telephony. The substantial growth rate of resource demand and provision, as well as of the global cloud traffic make create an imperative need for a detailed techno-economic analysis focusing, among others, on demand forecasting for cloud services, economic assessment of the investments needed to support this emerging computational model, switching costs, market competition, etc. The development of new usage and provision models and the understanding of how they could be used to provide utility for users, intermediary brokers (aggregators) and providers are also of paramount importance. 

CCTE combines process modeling and engineering design with economic evaluation, providing with both qualitatively and quantitative understanding of the impacts technology and business processes have on the cloud computing model, seeking to harvest its potential.

The workshop aims to serve as a melting pot for researchers and practitioners both in the areas of cloud computing and business management, in order to discuss and combine best practices in these fields into novel ideas and frameworks to accommodate new business models to harvest the potential of cloud computing taking into account both technological limitations and challenges, as well as market demands. 

An invited talk in the important area of cloud computing brokering will also be presented from an industry key-player.

Topics

We encourage submissions from both the academia and the industry are sought of the following types: a) original research work from authors in multiple fields, b) ideas papers exploring challenges and research roadmaps for the technoeconomic analysis of cloud infrastructure and services, c) case studies on successful business models to explore its potential. Topics include, but are not limited to:

·       Innovative Business Models for the Cloud

·       Cloud Service Pricing

o   Price Indices for Cloud Services

o   IAAS, PAAS, SAAS pricing policies

o   Social surplus maximization

o   Real options

·       Investing on Cloud Infrastructures

o   Investment Models

o   Cost/Benefit Analysis

o   Revenue maximization

o   Service Demand and Return on Investment

o   Switching Costs

·       Cloud adoption and diffusion

o   Forecasting demand for cloud services

o   Forecasting users’ demand for resources

o   Strategy for Enterprise Business Transformation

o   Case studies

·       Cloud Service Cost Engineering

o   ROI analysis

o   Total Cost of Ownership (TCO) analysis

o   Economy efficient use of the cloud

·       Modeling and Simulation of the Cloud

o   Infrastructure and Services

o   Client Behavior and Demand

o   Client – Provider Interaction

o   Large Scale Systems

o   The Cloud as a System-of-Systems

o   Game theory approaches

·       Cloud Brokering

o   Business models and brokering mechanisms

o   Value added services

o   Migration

o   Cloud brokering platforms

·       Cloud Service Composition

o   Combining Services from Multiple Providers

o   Optimizing Cost/Service Analysis

·       Case Studies and Experience Reports

o   Successful business models 

o   Lessons Learned

Important Dates  

Paper Title and Abstract due: November 5, 2015

Paper Submission deadline: November 15, 11:59pm PST, 2015

Notification: December 15, 2015

Camera ready: January 15, 2016

Submission Instructions

The results described in the submitted papers must be unpublished and must not be under review elsewhere. Papers should be submitted in PDF format. Submissions must conform to IEEE conference proceedings format and should not exceed 6 pages using 10-point font in the IEEE 8.5" x 11" two-column format (http://www.ieee.org/conferences_events/conferences/publishing/templates.html), including all text, figures, references and appendices.

Three to five keywords characterizing the paper should be indicated at the end of the abstract. 

Information about paper format can be found in IC2E 2106 site at http://conferences.computer.org/IC2E/2016/paper_submission.htm

Submission of a paper should be regarded as an undertaking that, should the paper be accepted, at least one of the authors will register and attend the workshop to present the paper. 

Extended versions of accepted papers will be invited for review in a special issue of an International Journal.

Submissions should be made electronically using EasyChair at: 

https://easychair.org/conferences/?conf=ic2eccte

Program Committee Chairs

Christos Michalakelis (michalak@hua.gr) Harokopio University of Athens, Greece	Mara Nikolaidou (mara@hua.gr) Harokopio University of Athens, Greece
Jorge Barbosa (jbarbosa@fe.up.pt)  University of Porto, Portugal	Katie Wood (K.Wood@wlv.ac.uk) University of Wolverhampton, UK

More info http://ccte.hua.gr

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CFP: VECPAR 2016 - High Performance Computing for Computational Science

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                             CALL FOR PAPERS

12th International Meeting on High-Performance Computing

         for Computational Science (VECPAR 2016)

                 University of Porto, Porto, Portugal

                            June 27 - 30, 2016                                                        

                       http://vecpar.fe.up.pt/2016/                                                                

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IMPORTANT DATES:

                                                                                                                                             

Deadline for submission:      January 15th, 2016

notification of acceptance:   March   3rd, 2016

camera­ ready version:         April   25th, 2016, on easychair.org.

The International Meeting on High­ Performance Computing for Computational Science (VECPAR) is 

the premier venue for presenting and discussing the latest research and practice in high­ end 

computer modeling and complex systems. VECPAR encourages submission of research contributions 

from academia, research laboratories and industry to address pressing issues in computational 

science resulting from applications of interest to society and hardware innovations. VECPAR’16, 

the 12th edition of the VECPAR series of conferences is organized by the University of Porto, 

Portugal, and will be held at the Department of Computer Science, School of Sciences. 

An award is planned for best student papers.

Contributions are solicited in all areas of computational science and engineering (CS&E), 

including (but not limited to) the following topics:

• Large­ scale Simulations in CS&E

• Parallel and Distributed Computing

• Parallel Algorithms

• Numerical Algorithms on Multicore, GPUs and Emerging Architectures

• Symbolic algorithms on Multicore, GPUs and Emerging Architectures

• Support Tools and Environments

• Scheduling and Load Balancing

• Performance Analysis, Evaluation and Tuning

You should make your submissions through EasyChair at:

https://www.easychair.org/conferences/?conf=vecpar2016

Submitted papers must be formatted according to  the rules of the Springer Series Lecture Notes in 

Computer Science (LNCS):

http://www.springer.com/computer/lncs?SGWID=0-164-6-793341-0

Please note that papers (for conference presentation) must not exceed 8 pages in length, using the 

LNCS format. Accepted papers will be distributed in electronic format to participants of VECPAR’16.

Printed versions of the invited talks and a set of selected papers will be published by Springer in 

the series entitled Lecture Notes in Computer Science. Selected papers will be limited to 14 pages 

and will be judged based on relevance, significance, originality, correctness and clarity. More 

information about this process will be sent to interested authors after the conference.

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Call for Papers: International Workshop on High Performance Energy Efficient Embedded Systems (4th Edition)

Apologies if you receive multiple copies of this email

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Call for Papers (CFP):

 

HIP3ES 2016

International Workshop on High Performance Energy Efficient Embedded Systems (4th Edition)

 

Prague, Czech Republic, Monday, Jan 18th 2016.

Co-Located with HiPEAC 2016

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AIMS AND SCOPE

 

HIP3ES aims at providing a high-quality forum to bring together researchers and practitioners to present new results and ongoing work on aspects related to high-performance and energery efficient embedded systems.

 

Topics of interest include, but are not limited to:

- Low Power High Performance Embedded Systems

- Resource Management in Many-core systems

- Runtime support for Many-core systems

- Virtualization in embedded systems

- Language and development tool-chains for High Performance Embedded Systems

 

IMPORTANT DATES

-   Submission: November 30th, 2015

-   Notification: December 15th, 2015

-   Final Version: January 5th, 2016

-   Workshop: 18th January, 2016

 

ORGANIZERS

   David Castells-Rufas (david.castells@uab.es) (Universitat Autònoma de Barcelona, Spain) and

   Cédric Bastoul (cedric.bastoul@unistra.fr) (University of Strasbourg, France)

 

PROGRAM COMMITTEE

- Alex Duran (Intel, Spain)

- Antoni Portero (IT4Innovations National Supercomputing Center, Czech Republic)

- Carlos Valderrama (Université de Mons, Belgium)

- Chang-Won Ahn (ETRI, Korea)

- Detlef Scholle (Alten, Sweden)

- Eduard Fernandez-Alonso (Recore Systems, Netherlands)

- Elisabeth Brunet (Telecom Sud Paris, France)

- Giovanni Agosta (Politecnico di Milano, Italy)

- Jaume Joven (U-Blox, Switzerland)

- Miquel Izquierdo (Solarflare, UK)

- Orlando Moreira (ST-Ericsson, Netherlands)

- Pablo P. Sanchez (Universisty of Cantabria, Spain)

- Rafael Asenjo (Universidad de Malaga, Spain)

- Stefan Wagner (University of Stuttgart, Germany)

- Thomas Soddemann (Fraunhofer SCAI, Germany)

- Vincent Loechner (University of Strasbourg, France)

- Yves Durand (CEA LETI, France)

 

 

SUBMISSION
Papers must be submitted online via EasyChair:
https://www.easychair.org/conferences/?conf=hip3es2016

Submitted papers should be in portable document format (PDF), formatted using
the ACM SIG Proceedings style guidelines (http://www.acm.org/sigs/publications/proceedings-templates). The text should be in a 9pt font in two columns; the length is restricted to 4-10 pages.

Proceedings will be available to all HiPEAC attendees and will be published online through http://arxiv.org

 

WEBSITE
https://www.hipeac.net/events/activities/7301/hip3es/

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SC15 Tutorials: YouTube previews

Thinking about registering for Tutorials at SC15 this year? With the early registration deadline approaching (**Oct 15**), check out the YouTube previews to help you decide!

https://www.youtube.com/playlist?list=PLgTok5xEj9ZWLCTTEvJcLMk0Maq32KMVw

(Previews are available for over half of this year's tutorials.)

-- CJ Newburn & Rich Vuduc, SC15 Tutorials co-chairs

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CFP - RAPIDO'16 co-located with HiPEAC Conference

[Please accept our apologies if you receive multiple copies of this message.]

=====================================================================

CALL FOR PAPERS

8th Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools - 

RAPIDO (http://www.rapido.deib.polimi.it)

in Prague, Czech Republic, 18 January, 2016

Held in conjunction with the HiPEAC Conference  (http://www.hipeac.net/conference)

Confirmed Keynote Speakers: - Khaled Benkrid, ARM - Jurgen Teich, University of Erlangen-Nuremberg - Tim Kogel, Synopsys

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Goal of the Workshop :

The focus of the RAPIDO workshop is on methods and tools for rapid simulation and performance evaluation in embedded and high performance system design. Given continuous advances in chip technology, it is to be expected that future-generation processors will integrate numerous units on a single die, including multiple (heterogeneous) processor cores, multiple levels of (shared/private) caches or memories, and dedicated accelerators, which will be glued together through a network on-chip (NoC).

The design space is huge though and several design metrics should be considered as well for selecting the optimal system configuration. Despite several years of research, the early stage design phase still requires to be supported by innovative design methodologies and tools for simulation, exploartion and performance evaluation. RAPIDO seeks for original research papers that face this challenge for embedded and high performance computing systems.

Topics of interest :

Topics of interest include, but are not limited to:

• Rapid simulation techniques targeted at novel architectures: Multi-cores, 3D-architectures, FPGA based heterogeneous Multi-cores/MPSoC, ...
• Variability and power/energy consumption in performance estimation and simulation techniques.
• High-level abstraction modeling, e.g., Transactional Level Modeling (TLM), Analytical Modeling, Trace-Driven Simulation …
• Design space exploration (DSE) for heterogeneous high-performance and embedded systems.
• Dynamic binary translation for fast simulation and DSE
• Experience reports using existing simulators and tools
• Benchmarking and simulator validation
• Early stage prototype of innovative architectures

Important dates:

Submission deadline: Nov 1, 2015

Notification to authors: Nov 24, 2015

Final version of accepted papers: Dec 3, 2015

Paper submission :

Electronic paper submission requires a full paper, up to 6 double-column ACM format pages, including figures and references. Up to 2 extra-pages can be requested for free to the organizing commettee (gianluca dot palermo at polimi dot it). Please use the following template when preparing your manuscript: http://www.acm.org/sigs/publications/proceedings-templates

The paper submission will be conducted using the EasyChair conference manager. Papers should be submitted in PDF format. You will find the submission site at:  https://easychair.org/conferences/?conf=rapido16

Accepted papers will be published in the ACM digital library.

Organizers:

Gianluca Palermo, Politecnico di Milano

Daniel Gracia Pérez, Thales Research and Technology France

Morteza Biglari-Abhari, University of Auckland

Smail Niar, University of Valenciennes

Daniel Chillet, Université de Rennes 1

Adam Morawiec, ECSI, France

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